Output parallel equalization circuit design

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How do we realize current equalization? When two modules are used in parallel, there will often be a module output current is high, a module output current is low, this time, if we can make the output current high module voltage drop, or output current current low module voltage rise, you can realize the individual module current to the direction of the average current adjustment.

Generally there are several ways to realize the function of equalization of module current:

(1) Output impedance method (sag method)

This method is to adjust the output impedance of the module to achieve the purpose of approximate equalization. As shown in the figure below, when used individually, if the module output current increases, the current signal is amplified through the current detection resistor R1, superimposed on the negative feedback input of the voltage loop, and after comparing with the reference voltage Vr, the output signal is fed back through the loop, which makes the output voltage decrease and reduces the module output current.

Modules used in parallel, assuming that the module 1 output current is large, the current signal through the negative feedback makes the module 1 output voltage is reduced, this time the module 1 output current decreases, so the module 2 output current will increase. Eventually, the two modules realize equalization of current.

This equalization method, with the increase of current, the output voltage will decrease, for the voltage accuracy requirements of the back-end equipment is not suitable, and equalization accuracy is relatively low.

(2) Master-slave setting method

    This method is to artificially set up a master module, the rest of the modules have all been the master module as a reference to allocate current, as shown below:

Each power supply module in the figure is a double-loop control system, in this control system, the engineer will set module l as the master module and make it work with voltage control, and the rest of the modules are set as slave modules, which work according to the current-type control method.

Ur is the reference voltage of the master module and Uf is the output voltage feedback signal. After the voltage error amplifier, the error voltage Ue is obtained, which becomes the current reference of the master module, and after comparing with Ui1 (this parameter reflects the size of the current of the master module), the control voltage Uc1 is generated to control the modulator and driver. Where the master module current will be modulated according to the current reference Ue.

When the modules are used in parallel, the voltage error amplifier of each slave module is connected in the form of a follower, the voltage error Ue of the main module is input to each follower, and the output of the follower is Ue, which becomes the current reference of each slave module, so that the currents of each slave module are modulated according to the value of Ue, which is basically the same as the current of the main module, so as to realize the equalization of the currents between the modules.

     This method can better ensure that the product to achieve stable operation, and does not appear in the current distribution characteristics of poor and other issues. However, this method of equalization requires a communication connection between the master and slave modules, and if the master module fails, the entire power supply system can not work properly, so the stability of the master module determines the reliability of the entire system, it can only equalize the current, is not suitable for forming a redundant parallel system.

(3) Average current method

This average current method requires the output of the current amplifier of each module in parallel, through a resistor R of the same resistance value to a common bus, known as the average current bus (ShareBus), as shown below:

The above figure shows the schematic diagram of a circuit in which each single module in parallel is automatically equalized according to the average current. As can be seen from the above figure, the input of the voltage amplifier is Vr′ and the feedback circuit Vr, Vr′ is the sum of the reference voltage Vr and the equalization control voltage VC, which is amplified by comparing with Vf to produce Ve (error voltage amplification), Ve controls the PWM and driver to adjust the output of the power stage.

When modules are used in parallel, the outputs of all modules are amplified by current sampling and connected to a common equalization bus. According to Kirchhoff's law, the sum of the currents flowing into the bus from all the branches is 0, it can be seen:

At this time, Vb responds to the average value of the current of all modules, and the difference between Vi and Vb is the equalization error, which is obtained after the error amplifier to get the control voltage Vc. When Vb=Vi, it means that the modules are equalized; when Vb≠Vi, it means that the current is not evenly distributed, and the error control signals from the uneven modules Vi and the equalization bus Vb are added with Vr and then inputted into the voltage amplifier, which outputs the error signal Ve, so as to Adjust the output of the module, so that the equalization of the current of each module.

This method can more accurately realize the equalization of current, but when the equalization bus is grounded, or when a module fails. All will make the module voltage decrease, resulting in output failure.

(4) Bus peak current method

  The peak current method requires that the outputs of the current amplifiers of the modules connected in parallel are connected to the same equalization bus (ShareBus) through an identical diode D, as shown in the figure below:

When modules are used in parallel, the equalizing bus Vb is equal to Vi-Vdf (diode voltage drop). This means that the voltage of the equalizing bus at this time is positively related to the largest Vb in each module. This equalization method can automatically turn the module with the largest load current into the main module, and the rest of the modules will converge the output current to the main module through the control loop.

     In this method, when one of the modules fails, the remaining modules will select a main module again to ensure that the system can still work properly, but due to the difference between the equalization bus and the module current sampling voltage by a diode voltage drop, resulting in the remaining modules can not be kept in perfect agreement with the main module current, which has a certain impact on the accuracy of the equalization of the current.

According to different market application environments and product demand positioning, you can choose different equalization scheme, the current market common equalization method for the bus peak current method: such as Jin Sheng Yang's LMF1000 series, through the bus peak equalization method, not only to achieve a higher average current accuracy, but also to achieve parallel redundancy, to ensure that the failure of a module, the back-end will not have a greater impact, greatly improving the reliability and stability of the system. Greatly improve the reliability and stability of the system.

With the exploration and research of market demand, Jinyang has been consistently plowing into power supply technology innovation to provide customers with better quality and more stable one-stop power supply solutions.